1. Field of the Invention
The invention relates in general to the fabrication of semiconductor integrated circuits (ICs), and more particularly to a method for forming a metal/metal nitride layer.
2. Description of the Related Art
As the integration of integrated circuits increases, the surface area of a wafer becomes insufficient for fabrication of required interconnections. In order to meet the surface requirement of the interconnections, multi-layered interconnections have become widely used in highly integrated devices. Typically, a dielectric layer is formed between metallic layers to isolate the metallic layers from each other. A metallic plug is formed to connect the metallic layers to each other. However, in order to improve the adhesion between the metallic plug and other materials as well as to avoid a spike effect between the metallic plug and silicon material, it is necessary to form a barrier layer before the metallic plug.
Titanium nitride (TixNy) is a barrier layer material or a glue layer material frequently used in Very Large Scale Integration (VLSI). In order to improve the ohmic contact between the metallic plug and the silicon material, titanium nitride is usually used with titanium. For example, titanium/titanium nitride (Ti/TiN) are used together as a barrier layer in order to reduce the work function at a junction as well as to prevent the occurrence of the spike effect and electrical migration.
Among all metal materials, tungsten has an advantageous high melting point, heat expansion ratio, and correspondence to silicon. In addition, tungsten deposited by chemical vapor deposition (CVD) does not have a high internal stress, and has a better step coverage. Thus, the manufacture of the metal plug with tungsten deposited by CVD has been widely used in the secondary micrometer process.
FIGS. 1A to 1C are schematic, cross-sectional views showing a conventional method of forming a titanium/titanium nitride layer. In FIG. 1A, a metal oxide semiconductor (MOS) transistor 102 is formed on a substrate 100. A patterned dielectric layer 104 is formed on the substrate 100 to cover the MOS transistor 102. The patterned dielectric layer 104 comprises a contact opening 106 therein. The contact opening 106 exposes a portion of a source/drain region 108 in the substrate 100.
In FIG. 1B, a titanium layer 110 is sputter-deposited on the dielectric layer 104 to cover the exposed source/drain region 108. The titanium layer 110 is conformal to the contact opening 106. In order to increase the deposition ability of the titanium layer 110, a collimator (not shown) is placed between the substrate 100 and a metallic target (not shown) while forming the titanium layer 110.
In FIG. 1C, a titanium nitride layer 112 is formed on the titanium layer 110 by physical vapor deposition (PVD). The titanium nitride layer 112 is conformal to the contact opening 106. The titanium layer 110 and the titanium nitride layer 112 together form a barrier layer. However, the barrier layer formed by physical vapor deposition on a contact or a via, having a high aspect ratio does not have a sufficient step coverage ability. The titanium layer 110 positioned on the comers of the bottom of the contact opening 106 is exposed, as indicated by reference number 114 shown in FIG. 1C, while depositing the titanium nitride layer 112.
When tungsten metal is deposited in the contact opening 106 as a plug, WF.sub.6 serves as the gas source for CVD. Once the titanium layer 110 is exposed due to the poor step coverage of the titanium nitride layer 12 or any defect in the titanium nitride layer 112, F atoms released by WF.sub.6 can pass through the titanium nitride layer 112 and react with titanium located below to form TiF.sub.4. As TiF.sub.4 is a volatile gas, a phenomenon similar to an explosion will occur when tungsten is deposited on the contact opening 106. This is known as a volcano effect. The occurrence of such an effect results in removal or bending of the titanium nitride layer 112, allowing tungsten to be deposited on both sides of the titanium nitride 112 layer that are removed. If this occurs on the top end comer of the contact opening or the interlayer opening, there will be a projection of the surface of the tungsten layer. When the projection is too severe, the projection is difficult to remove using a normal reactive etching process. As a result, this leads to the problems of a blind window, a short circuit, wafer pollution, and low production.